Synopsys pulls back from chip fab software to chase AI design margins

Synopsys, the US chip design software giant, is preparing to walk away from the manufacturing control software that helps run the world’s semiconductor fabs, and to redirect the engineers behind it towards the far more lucrative business of AI chip design.

The plan, reported by Reuters and attributed to six people briefed on the matter, is a pointed retreat from the factory floor for a firm whose AI pivot has already drawn a $2bn vote of confidence from Nvidia.

According to two of those sources, Synopsys told more than 10 chipmakers, among them Samsung Electronics, SK Hynix, Kioxia, and Qorvo, that a suite of its manufacturing tools had reached “end of life.” The notices, sent in April and May, mean no future versions, only maintenance, with talks on remaining support obligations due to conclude by July.

At the centre of the decision sit two products, the Equipment Engineering System (EES) and Fault Detection and Classification (FDC). Two sources described the software as the nervous system of a fabrication plant, watching equipment in real time and flagging anomalies before they cascade into costly defects.

Synopsys did not name the products publicly. A spokesperson told Reuters the company was “discontinuing certain manufacturing analytics products, which are older diagnostic tools not in our customers’ critical paths of production,” while insisting it would keep investing in the area and honour existing contracts.

So why abandon software that global fabs depend on? The short answer, according to the people familiar with the plan, is margins: Synopsys wants to free up engineers tied to support and maintenance work and aim them at AI design, the field it has been building out aggressively since completing its $35bn acquisition of Ansys in 2025.

There is a strategic logic beyond headcount. Enhancing EES reportedly required chipmakers to share tightly held manufacturing data, and some clients, including Samsung, were already developing their own in-house tools, which two sources said had eroded the competitiveness of the Synopsys offering.

Not everyone agrees on the risk

One source, backed by a second, cautioned that stripping out maintenance and patches could dent production yields at some chipmakers over time, since the software needs constant upkeep. Four other sources said they expected no impact at the major manufacturers.

Samsung, for its part, confirmed the end-of-life decision and said active discussions with Synopsys were underway. It had lined up compatible alternatives and expected “no negative impact on production,” a spokesperson said. SK Hynix declined to comment, while Kioxia and Qorvo did not respond to requests.

The retreat carries a human cost that Synopsys would not quantify. The company has already laid off a few dozen staff linked to the products, three sources said, though it declined to confirm whether jobs were cut or to detail the timing.

The software is relatively new to the Synopsys stable, arriving through its 2021 purchase of manufacturing solutions from South Korean firm BISTel. Letting it go fits a broader reshaping of the EDA industry, where vendors pour resources into AI design tools while chipmakers increasingly write their own factory software and startups rethink the economics of who owns the underlying silicon.

For Synopsys, the direction is unmistakable. This is a company that has spent decades supplying the software used to arrange the tens of billions of transistors on a modern chip, features that can be 2,000 times thinner than a human hair.

In March it unveiled technology it said would let AI agents take over many of the tasks in creating chips, the future it now clearly wants to run towards. The wager is that autonomous design software, rather than factory maintenance contracts, is where the next decade of growth lies.